[分立后级] IGBT能做功放么?

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 楼主| 发表于 2015-6-3 21:01 | 显示全部楼层
xmlhifi 发表于 2015-6-3 20:57
参考著名的亚历山大电路

论坛里有么?

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脑放进行时

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社区贡献 优秀设计 论坛版主

发表于 2015-6-3 21:29 | 显示全部楼层

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 楼主| 发表于 2015-6-3 21:58 | 显示全部楼层
xmlhifi 发表于 2015-6-3 21:29
ADI官网  亚历山大电路
http://www.analog.com/cn/search.html?q=AN-211

英文不好粗看了下。P-IGBT我还头次见。特点没太吃准,应是个运放推动的全对称电路。频带够宽这可能同管子特性好关联很大,没用恒流源。

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发表于 2015-6-5 11:11 | 显示全部楼层
IGBT模块功放.jpg

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发表于 2015-6-5 11:13 | 显示全部楼层
在电焊机上见到过这种管子

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 楼主| 发表于 2015-6-5 16:33 | 显示全部楼层

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 楼主| 发表于 2015-6-5 16:33 | 显示全部楼层
iamusb 发表于 2015-6-5 11:13
在电焊机上见到过这种管子

电磁灶肯定是这东西

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发表于 2015-6-8 00:53 | 显示全部楼层

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 楼主| 发表于 2015-6-8 22:01 | 显示全部楼层

能解释一下下边运放有何做用么?我看是不大管用。

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 楼主| 发表于 2015-6-8 22:09 | 显示全部楼层
xmlhifi 发表于 2015-6-3 21:29
ADI官网  亚历山大电路
http://www.analog.com/cn/search.html?q=AN-211

又看了一下原看错了,用了一对恒流源。时间常数?
但下边的运放并没扣上环,有何用?前向通道运放电源抑制比差?地中点不稳?看不明白能有何用?

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发表于 2015-6-9 09:45 | 显示全部楼层
扬帆远航 发表于 2015-6-8 22:01
能解释一下下边运放有何做用么?我看是不大管用。

同样看不明白下边A2作用,里面全是洋文也看不懂,期待有人讲解一下。
看指标不错。

sa.jpg
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发表于 2015-6-9 15:34 | 显示全部楼层
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发表于 2015-6-9 16:22 | 显示全部楼层
不懂!

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 楼主| 发表于 2015-6-9 16:40 | 显示全部楼层

别说空话,说因果顺序。中点没有这个照样不跑
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 楼主| 发表于 2015-6-9 19:03 | 显示全部楼层
tsyg99 发表于 2015-6-9 18:03
只要你·多看几十遍就会明白的
如果是温控中点就更复杂了

只要你不看就更明白了。因为说空话不用看。所问非所答。这要再出个月求8号就太难了。
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 楼主| 发表于 2015-6-9 21:47 | 显示全部楼层
tsyg99 发表于 2015-6-9 19:35
每看一次就会有一次收获吧?
多看几次也就会解密了

没因果关系怎么说都没对错,因为3不粘

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发表于 2015-6-10 08:20 | 显示全部楼层
扬帆远航 发表于 2015-6-8 22:09
又看了一下原看错了,用了一对恒流源。时间常数?
但下边的运放并没扣上环,有何用?前向通道运放电源抑 ...


特意把相关部分洋文抄了下来,能看懂这部分洋文应该也能了解差不多了。(期待有人详细解说一下)

DC Control Amplifier

The purpose of this to additional input stage is to provide an accurate, low drift, dc gain path to the main output this is independent of the AC gain path and its poor DC characteristics.

In the original version of this amplifier, expensive precision matched NPN and PNP dual transistors were used in the two current mirrors, but no DC control amplifier was used.

It was incorrectly assumed that precise matching of the transistors in each mirror would result in very low output offset voltage as as long as the input buffer had reasonably low input offset voltage as well.

As it happens, thia is not the case with a current feedback amplifier. Any mismatch between the two current mirrors results in a finite amount of bias current appearing at the output terminal of input buffer,

which must flow through feedback resistor R8 to the output. It cannot flow through R6 and R7 to ground, because the current in these resistor is set only by the voltage appearing at the output of the inpt buffer.

The output offset voltage,without the DC control amplifier is thus:

Voos=Viso(A1)[1+R7/R8][1+R8/(R7+R7)

Normally, Vios(A1)can be made quite small by using a low offset op amp. Unfortunately, the out terminal bies current,

Ibias can be as large as 100uA under static conditions and even larger if a thermal gradient exists between the two mirrors on the power amplifier driver board.

This can easily lead to an output offset in excess of 100mV,which changes as the amplifier warms up.

A large offset like this is likely to cause an audible click when the relay that connects the loudspeakers to the  amplifier is energized, and is generally undesirable.

The solution to these problems is a low frequency servo loop the controls the DC output voltage, independently of any low frequency current or voltage fluctuations in the main current feedback gain path.

this is facilitated by the use of a second low power precision OP amp, A2,that is configures as an integrator with very low crossover frequency (less then 5Hz).

the low crossover frequency ensures that the integrator will not have any effect on the performance of the overall amplifier in the audio band.

Voltage feedback is applied from the main output back to the input of the integrator through resistors R10 and R11, which set the closed-loop DC gain.

This gain is made equal to that given by equation(1). Since A2 drives a resistor connected to ground, as shown in figure 2.

it behaves as an operational transconductance amplifier with the output current taken from its power supply terminals.

This compensating out current is then fed to the two common-base regulator transistors where it is summed with the signal current from the power supply terminals of A1.

The output current of A2 is thus forced to cancel Ibias almost exactly because the DC gain of the integrator, coupled with the additional gain produced by the transimpedance stage,

is very high. Consequently,the integrating control loop completely overrides the current feedback loop at DC and the output offset is reduced from that given by Equation(4) to:

Voos=Vios(A2)X(1+R11/R10)

This means that it can be made arbitrarily small through the choice of a low offset amplifier for A2.

Here the cost of an additional op amp is more than offset by not having to use expensive matched NPN and PNP dual transistors in the current mirrors.


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 楼主| 发表于 2015-6-10 08:43 | 显示全部楼层
A940184 发表于 2015-6-10 08:20
特意把相关部分洋文抄了下来,能看懂这部分洋文应该也能了解差不多了。(期待有人详细解说一下)

DC ...

晚上没事时我试试看。A1有无说明都问题不大。关键是A2.
版主帖的链接没给文发时间也不是PDF,翻译软件不认(你这也不认)能查出发表年代么?我估计很老。
我没猜错的话VIOS是失调电压(还得看看)如是就可不理它了,这就不是问题。
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